2011 E3S SYMPOSIUM

Program

Nov 4 >>

Thursday, November 3

8:00 am

Badge Pickup & Continental Breakfast

8:40 am

Welcome and Opening Remarks 

Eli Yablonovitch, U. of California, Berkeley


Session 1

 Chair - Dimitri Antoniadis, MIT

9:00 am

The Need for Energy Efficient Electronics   

Wilfried Haensch, IBM

9:30 am

Circuit and System Driven Requirements for Digital Logic Devices   

Elad Alon, U. of California, Berkeley

10:00 am

Fulfilling Digital Logic Requirements by Tunnel Transistors   

Alan Seabaugh, U of Notre Dame

10:30 am

Break


Session 2

 Chairs - Dimitri Antoniadis, MIT & Jeffrey Bokor, U. of California, Berkeley

10:50 am

Tunnel Transistor Mechanism Based on Density of States Switching  

Eli Yablonovitch, U. of California, Berkeley

11:20 am

Keynote - Power: Where It Matters, When It Matters, and When It Does Not   

Dan Hutcheson, VLSI Research, Inc.

12:00 noon

Lunch


Session 3

 Chair - Chenming Hu, U. of California, Berkeley

1:30 pm

Development of Core Technologies for Green Nanoelectronics   

Naoki Yokoyama, AIST

2:00 pm

Nanowire Tunnel FET's 

Heike Riel, IBM

2:30 pm

Low Transistor Variability – The Key to Energy Efficient ICs 

Robert Rogenmoser, SuVolta

3:00 pm

Sub-Threshold Transistors and Circuits

Peter Wyatt, MIT Lincoln Lab

3:30 pm

Break


Session 4

 Chair - Daniel Radack, IDA

4:00 pm

TFET Research in the EU STEEPER Project 

Adrian Ionescu, EPFL

4:30 pm

The Path Toward Efficient Nano-Mechanical Circuits and Systems   

Tsu-Jae King Liu, U. of California, Berkeley

5:00 pm

Piezoelectric Nano-Electro-Mechanical Systems for milli-Volt and few kT Switching   

Gianluca Piazza, U. of Pennsylvania

5:45 pm

Networking Reception, Lobby of Hearst Mining Memorial Building

Nov 3 >>

Friday, November 4

8:30 am

Continental Breakfast


Session 5

 Chair - Eli Yablonovitch, U. of California, Berkeley

9:00 am

Stochastic Computing: A Design Sciences Driven Approach to Moore’s Law   

Naresh Shanbhag, U. of Illinois, Urbana-Champaign

9:30 am

3D Technologies for Low Power Integrated Circuits   

Paul Franzon, North Carolina State U.

10:00 am

Concepts for Spin Communication and Logic   

Jeffrey Bokor, U. of California, Berkeley

10:30 am

Break


Session 6

 Chair - Tsu-Jae King Liu, U. of California, Berkeley

10:50 am

Emerging Memories: Are They Energy Efficient Enough?   

Philip Wong, Stanford University

11:20 am

Nanoelectrochemical Switching for for Programmable Logic   

Toshitsugu Sakamoto, LEAP

11:50 am

Nonvolatile CMOS Circuits Using Magnetic Tunnel Junction   

Hideo Ohno, Tohoku U.

12:20 pm

Lunch


Session 7

 Chair - Eugene Fitzgerald, MIT

1:30 pm

Nanophotonic Devices for Energy Efficient Optical Interconnect   

Ming Wu, U. of California, Berkeley

2:00 pm

Monolithic Integration of Energy Efficient CMOS Silicon Photonic Interconnects 

Vladimir Stojanovic, MIT

2:30 pm

Maximizing Power Usage in Data Centers  

Taliver Heath, Google

3:00 pm

Ultra-Low Power Platforms for Human Enhancement   

Jan Rabaey, U. of California, Berkeley

3:30 pm

Closing Remarks 

Jeffrey Bokor and Paul Wright, U. of California, Berkeley